DF2110BVTE10 Renesas Electronics America, DF2110BVTE10 Datasheet - Page 223

• Manufacturer Part Number: DF2110BVTE10
• Description: MCU 3V 64K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2110BVTE10

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 10MHz
• Connectivity: Host Interface (LPC), I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Other names: HD64F2110BVTE10; HD64F2110BVTE10

Notes: 1. If the TMR_Y clock input is set as the TCNT_X overflow signal and the TMR_X clock
Channel CKS2
TMR_X
2. The program development tool (emulator) does not support TCRXY. Selection of the
TCR
0
0
0
0
1
0
0
0
0
1
1
1
1
input is set as the TCNT_Y compare-match signal simultaneously, a count-up clock
cannot be generated. These settings should not be made.
internal clock is only available when CKSX = 0 and CKSY = 0.
CKS1
0
0
1
1
0
0
0
1
1
0
0
1
1
CKS0
0
1
0
1
0
0
1
0
1
0
1
0
1
TCRXY *
CKSX
0
0
0
0
0
1
1
1
1
1
—
—
—
2
CKSY
—
—
—
—
—
—
—
—
—
—
—
—
—
Description
Disables clock input
Increments at
Increments at /2
Increments at /4
Disables clock input
Disables clock input
Increments at /2048
Increments at /4096
Increments at /8192
Increments at compare-match A from
TCNT_Y *
Increments at rising edge of external
clock
Increments at falling edge of external
clock
Increments at both rising and falling
edges of external clock
Rev. 2.00 Mar 21, 2006 page 183 of 518
1
Section 10 8-Bit Timer (TMR)
REJ09B0299-0200