DF2110BVTE10 Renesas Electronics America, DF2110BVTE10 Datasheet - Page 422

• Manufacturer Part Number: DF2110BVTE10
• Description: MCU 3V 64K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2110BVTE10

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 10MHz
• Connectivity: Host Interface (LPC), I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Other names: HD64F2110BVTE10; HD64F2110BVTE10

Section 15 Host Interface LPC Interface (LPC)
Bit
4
3
Rev. 2.00 Mar 21, 2006 page 382 of 518
REJ09B0299-0200
Bit Name Initial Value Slave Host Description
SMIE3B
SMIE3A
0
0
R/W
R/W
R/W
—
—
Host SMI Interrupt Enable 3B
Enables or disables a host SMI interrupt request
when OBF3B is set by a TWR15 write.
0: Host SMI interrupt request by OBF3B and SMIE3B
is disabled
[Clearing conditions]
1: [When IEDIR = 0]
[Setting condition]
Writing 1 after reading SMIE3B = 0
Host SMI Interrupt Enable 3A
Enables or disables a host SMI interrupt request
when OBF3A is set by an ODR3 write.
0: Host SMI interrupt request by OBF3A and SMIE3A
is disabled
[Clearing conditions]
1: [When IEDIR = 0]
[Setting condition]
Writing 1 after reading SMIE3A = 0
Writing 0 to SMIE3B
LPC hardware reset, LPC software reset
Clearing OBF3B to 0 (when IEDIR = 0)
Host SMI interrupt request by setting OBF3B to 1
is enabled
[When IEDIR = 1]
Host SMI interrupt is requested
Writing 0 to SMIE3A
LPC hardware reset, LPC software reset
Clearing OBF3A to 0 (when IEDIR = 0)
Host SMI interrupt request by setting OBF3A to 1
is enabled
[When IEDIR = 1]
Host SMI interrupt is requested