DF2110BVTE10 Renesas Electronics America, DF2110BVTE10 Datasheet - Page 477

• Manufacturer Part Number: DF2110BVTE10
• Description: MCU 3V 64K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2110BVTE10

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 10MHz
• Connectivity: Host Interface (LPC), I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Other names: HD64F2110BVTE10; HD64F2110BVTE10

Table 18.4 External Clock Output Stabilization Delay Time
Condition: V
Note: * t
18.2
The duty correction circuit is valid when the oscillating frequency is 5 MHz or more. It corrects
the duty of a clock that is output from the oscillator, and generates the system clock ( ).
18.3
The medium-speed clock divider divides the system clock ( ), and generates /2, /4, /8, /16,
and /32 clocks.
Item
External clock output stabilization delay
time
DEXT
Note:* The external clock output stabilization delay time (t
V
STBY
EXTAL
φ
(Internal and external)
RES
Duty Correction Circuit
Medium-Speed Clock Divider
CC
Figure 18.6 Timing of External Clock Output Stabilization Delay Time
includes a RES pulse width (t
CC
2.7 V
= 2.7 V to 3.6 V, V
V
IH
SS
= 0 V
Symbol
t
RESW
DEXT
*
).
t
DEXT
*
Min.
500
DEXT
) includes a RES pulse width (t
Rev. 2.00 Mar 21, 2006 page 437 of 518
Section 18 Clock Pulse Generator
Max.
—
Unit
s
RESW
REJ09B0299-0200
).
Remarks
Figure 18.6