DF2110BVTE10 Renesas Electronics America, DF2110BVTE10 Datasheet - Page 191

• Manufacturer Part Number: DF2110BVTE10
• Description: MCU 3V 64K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2110BVTE10

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 10MHz
• Connectivity: Host Interface (LPC), I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Other names: HD64F2110BVTE10; HD64F2110BVTE10

9.3.4
OCRAR and OCRAF are 16-bit readable/writable registers. When the OCRAMS bit in TOCR is
set to 1, the operation of OCRA is changed to include the use of OCRAR and OCRAF. The
contents of OCRAR and OCRAF are automatically added alternately to OCRA, and the result is
written to OCRA. The write operation is performed on the occurrence of compare-match A. In the
1st compare-match A after setting the OCRAMS bit to 1, OCRAF is added. The operation due to
compare-match A varies according to whether the compare-match follows addition of OCRAR or
OCRAF. The value of the OLVLA bit in TOCR is ignored, and 1 is output on a compare-match A
following addition of OCRAF, while 0 is output on a compare-match A following addition of
OCRAR.
When using the OCRA automatic addition function, do not select internal clock /2 as the FRC
input clock together with a set value of H'0001 or less for OCRAR (or OCRAF).
OCRAR and OCRAF should always be accessed in 16-bit units; cannot be accessed in 8-bit units.
OCRAR and OCRAF are initialized to H'FFFF.
9.3.5
OCRDM is a 16-bit readable/writable register in which the upper 8 bits are fixed at H'00. When
the ICRDMS bit in TOCR is set to 1 and the contents of OCRDM are other than H'0000, the
operation of ICRD is changed to include the use of OCRDM. The point at which input capture D
occurs is taken as the start of a mask interval. Next, twice the contents of OCRDM is added to the
contents of ICRD, and the result is compared with the FRC value. The point at which the values
match is taken as the end of the mask interval. New input capture D events are disabled during the
mask interval. A mask interval is not generated when the contents of OCRDM are H'0000 while
the ICRDMS bit is set to 1.
OCRDM should always be accessed in 16-bit units; cannot be accessed in 8-bit units. OCRDM is
initialized to H'0000.
Output Compare Registers AR and AF (OCRAR, OCRAF)
Output Compare Register DM (OCRDM)
Section 9 16-Bit Free-Running Timer (FRT)
Rev. 2.00 Mar 21, 2006 page 151 of 518
REJ09B0299-0200