D6417760BP200ADV Renesas Electronics America, D6417760BP200ADV Datasheet - Page 904

• Manufacturer Part Number: D6417760BP200ADV
• Description: IC SUPER H MPU ROMLESS 256BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of D6417760BP200ADV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Rev. 2.00 Feb. 12, 2010 Page 820 of 1330
REJ09B0554-0200
Bit
8
7
Bit Name
IRR8
IRR7
Initial Value
0
0
R/W
R/W
R/W
Description
Mailbox Empty Interrupt Flag
Indicates that message transmission or
transmission cancellation has been successfully
ended, and the Mailbox is now ready to accept a
new message data for the next transmission. This
bit is set when at least one CANTXPR bit is
cleared. This bit is set by an OR'ed signal of the
CANTXACK and CANABACK bits, therefore, this
bit is automatically cleared when all the
CANTXACK and CANABACK bits are cleared.
Writing a 0 has no effect. Note that this bit does
not indicate that all CANTXPR bits are reset,
whereas GSR2 does.
0: Messages set for transmission or transmission
1: Message has been transmitted or aborted, and
Overload Frame
Indicates that the HCAN2 has transmitted an
overload frame. It remains latched until reset by
writing a 1 to this bit position. Writing a 0 has no
effect.
0: Clearing condition: Write a 1 to this bit.
1: Setting condition: Overload frame is
transmitted.
cancellation is not in progress.
Clearing condition: All the CANTXACK and
CANABACK bits are cleared.
a new message can be stored.
Setting condition: One of the CANTXPR bits is
cleared by completion of transmission or
completion of transmission abort (i.e. in case
of CANMBIMR = 0, the CANTXACK or
CANABACK bit is set).