D6417760BP200ADV Renesas Electronics America, D6417760BP200ADV Datasheet - Page 749

• Manufacturer Part Number: D6417760BP200ADV
• Description: IC SUPER H MPU ROMLESS 256BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of D6417760BP200ADV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Table 19.2 Register Configuration (1)
Ch. Register Name
0
1
Slave control register 0
Master control register 0
Slave status register 0
Master status register 0
Slave interrupt enable register 0
Master interrupt enable register 0 ICMIER0 R/W
Clock control register 0
Slave address enable register 0
Master address enable register 0 ICMAR0
Receive data register 0
Transmit data register 0
FIFO control register 0
FIFO status register 0
FIFO interrupt enable register 0
Receive FIFO data count register 0
Transmit FIFO data count register 0
Slave control register 1
Master control register 1
Slave status register 1
Master status register 1
Slave interrupt enable register 1
Master interrupt enable register 1 ICMIER1 R/W
Clock control register 1
Slave address enable register 1
Master address enable register 1 ICMAR1
Receive data register 1
Transmit data register 1
FIFO control register 1
FIFO status register 1
FIFO interrupt enable register 1
Receive FIFO data count register 1
Transmit FIFO data count register 1
Abbrev.
ICSCR0
ICMCR0
ICSSR0
ICMSR0
ICSIER0
ICCCR0
ICSAR0
ICRXD0
ICTXD0
ICFCR0
ICFSR0
ICFIER0
ICRFDR0 R
ICTFDR0 R
ICSCR1
ICMCR1
ICSSR1
ICMSR1
ICSIER1
ICCCR1
ICSAR1
ICRXD1
ICTXD1
ICFCR1
ICFSR1
ICFIER1
ICRFDR1 R
ICTFDR1 R
R/W
R/W
R/W
R/(W)*
R/(W)*
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/(W)*
R/(W)*
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
1
2
1
2
P4 Address
H'FE14 0000
H'FE14 0004
H'FE14 0008
H'FE14 000C
H'FE14 0010
H'FE14 0014
H'FE14 0018
H'FE14 001C
H'FE14 0020
H'FE14 0024
H'FE14 0024
H'FE14 0028
H'FE14 002C
H'FE14 0030
H'FE14 0034
H'FE14 0038
H'FE15 0000
H'FE15 0004
H'FE15 0008
H'FE15 000C
H'FE15 0010
H'FE15 0014
H'FE15 0018
H'FE15 001C
H'FE15 0020
H'FE15 0024
H'FE15 0024
H'FE15 0028
H'FE15 002C
H'FE15 0030
H'FE15 0034
H'FE15 0038
Rev. 2.00 Feb. 12, 2010 Page 665 of 1330
Area 7 Address Size
H'1E14 0000
H'1E14 0004
H'1E14 0008
H'1E14 000C
H'1E14 0010
H'1E14 0014
H'1E14 0018
H'1E14 001C
H'1E14 0020
H'1E14 0024
H'1E14 0024
H'1E14 0028
H'1E14 002C
H'1E14 0030
H'1E14 0034
H'1E14 0038
H'1E15 0000
H'1E15 0004
H'1E15 0008
H'1E15 000C
H'1E15 0010
H'1E15 0014
H'1E15 0018
H'1E15 001C
H'1E15 0020
H'1E15 0024
H'1E15 0024
H'1E15 0028
H'1E15 002C
H'1E15 0030
H'1E15 0034
H'1E15 0038
Section 19 I
REJ09B0554-0200
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
2
C Bus Interface
Sync
Clock
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck