D6417760BP200ADV Renesas Electronics America, D6417760BP200ADV Datasheet - Page 1139
D6417760BP200ADV
Manufacturer Part Number
D6417760BP200ADV
Description
IC SUPER H MPU ROMLESS 256BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet
1.D6417760BP200ADV.pdf
(1418 pages)
Specifications of D6417760BP200ADV
Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D6417760BP200ADV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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29.4.5
A/D conversion can also be started by an external trigger input (except in multi mode). When the
TRGE1 and TRGE0 bits in ADCSR are both set to 1, an external trigger input is enabled at the
ADTRG pin.
The ADST bit in ADCSR is set to 1 at the falling edge of the ADTRG pin, thus starting A/D
conversion. Other operations, regardless of the conversion mode, are the same as if the ADST bit
had been set to 1 by software. Figure 29.6 shows this timing.
ADTRG shift 1
ADTRG shift 2
ADTRG shift 3
Internal start
trigger signal
ADTRG
External Trigger Input Timing
ADST
Pck
Note: The minimum pulse width of ADTRG must be at least Pck x 2.
Figure 29.6 External Trigger Input Timing
Rev. 2.00 Feb. 12, 2010 Page 1055 of 1330
A/D conversion
REJ09B0554-0200
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