D6417760BP200ADV Renesas Electronics America, D6417760BP200ADV Datasheet - Page 413
D6417760BP200ADV
Manufacturer Part Number
D6417760BP200ADV
Description
IC SUPER H MPU ROMLESS 256BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet
1.D6417760BP200ADV.pdf
(1418 pages)
Specifications of D6417760BP200ADV
Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D6417760BP200ADV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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bank active state, after this is detected, the bus cycle in figure 10.22 or 10.25 is executed instead of
that in figure 10.21 or 10.24. In RAS down mode, a PALL command is also issued before a
refresh cycle or before bus release due to bus arbitration.
DACKn
(SA: IO ← memory)
Bank
D31–D0
(read)
CKIO
Precharge-sel
Address
CSn
RD/WR
RAS
CASS
DQMn
BS
CKE
Note: For DACKn, an example is shown where CHCRn.AL (acknowledge level) = 0 for the DMAC.
Tr
Row
Row
Row
Trw
Tc1
Figure 10.20 Burst Read Timing
Tc2
H/L
c1
Tc3 Tc4/Td1 Td2
c1
c2
Td3
Rev. 2.00 Feb. 12, 2010 Page 329 of 1330
H/L
c3
c5
Td4
c4
Td5
c5
Td6
c6
Td7
REJ09B0554-0200
c7
Td8
c8
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