D6417760BP200ADV Renesas Electronics America, D6417760BP200ADV Datasheet - Page 1128
D6417760BP200ADV
Manufacturer Part Number
D6417760BP200ADV
Description
IC SUPER H MPU ROMLESS 256BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet
1.D6417760BP200ADV.pdf
(1418 pages)
Specifications of D6417760BP200ADV
Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D6417760BP200ADV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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29.3.2
ADCSR is a 16-bit readable/writable register that controls A/D conversion operations and displays
the A/D conversion status.
Initial value:
Rev. 2.00 Feb. 12, 2010 Page 1044 of 1330
REJ09B0554-0200
Bit
15
14
R/W:
Bit:
Bit
Name
ADF
ADIE
A/D Control/Status Register (ADCSR)
R/(W)* R/W
ADF
15
0
ADIE
14
0
Initial
Value
0
0
ADST DMASL TRGE1 TRGE0
R/W
13
0
R/W
12
0
R/W
R/(W)*
R/W
R/W
11
0
R/W
10
0
Description
A/D End Flag
A status flag that indicates the end of A/D conversion.
[Clearing conditions]
•
•
Note: If 1 is written, the previous value is retained.
[Setting conditions]
•
•
•
When operation is stopped during conversion in multi
mode or scan mode, the ADF bit is not set.
A/D Interrupt Enable
Enables or disables the interrupt (ADI) requested at the
end of A/D conversion. Do not change the ADIE bit
setting during A/D conversion.
0: A/D conversion end interrupt (ADI) request is disabled
1: A/D conversion end interrupt (ADI) request is enabled
When 0 is written after reading ADF = 1 with ADF = 1
When ADDR is read with DMASL = 1 (DMA transfer)
Single mode: A/D conversion ends
Multi mode: A/D conversion has cycled through the
selected channels (A/D conversion cycles through the
selected channels)
Scan mode: A/D conversion has cycled through the
selected channels (A/D conversion is continuously
repeated for the selected channels)
R
9
0
-
R
8
0
-
CKSL1 CKSL0 MDS1
R/W
7
0
R/W
1
6
R/W
5
0
MDS0
R/W
4
0
R
3
0
-
R
2
0
-
R/W
CH1
1
0
R/W
CH0
0
0
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