D6417760BP200ADV Renesas Electronics America, D6417760BP200ADV Datasheet - Page 488
D6417760BP200ADV
Manufacturer Part Number
D6417760BP200ADV
Description
IC SUPER H MPU ROMLESS 256BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet
1.D6417760BP200ADV.pdf
(1418 pages)
Specifications of D6417760BP200ADV
Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D6417760BP200ADV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Bit
Note: n = 0 to 3
Rev. 2.00 Feb. 12, 2010 Page 404 of 1330
REJ09B0554-0200
Bit Name
Initial Value
R/W
Description
Notes: 1. This setting is valid only in DMABRG mode.
2. The DMABRG settings are valid only in
3. Use this setting when the DMA transfer is
In external request 2-channel mode, DREQ0
or DREQ1 can be accepted (only for
channel 0 or 1) regardless of this setting.
channel 0. In DMABRG mode, when
selecting channel 0 transfer request source
in DMABRG, don’t change the channel 0
transfer request source after the DMABRG
DMA transfer starts. Normal operation is not
guaranteed if the transfer request source is
changed.
complete with the request in DMAC retained
(DMARCR.REXn = 1). See (3) Notes on
Transfer End in section 11.4.6, Ending DMA
Transfer.
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