D6417760BP200ADV Renesas Electronics America, D6417760BP200ADV Datasheet - Page 1341
D6417760BP200ADV
Manufacturer Part Number
D6417760BP200ADV
Description
IC SUPER H MPU ROMLESS 256BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet
1.D6417760BP200ADV.pdf
(1418 pages)
Specifications of D6417760BP200ADV
Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D6417760BP200ADV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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(write)
CKIO
Bank
Precharge-sel
Address
CSn
RD/WR
RAS
CASS
DQMn
D31-D0
BS
CKE
DACKn
(SA: IO
NOTES:
Figure 33.34 Synchronous DRAM Normal Write Bus Cycle: WRITE Command, Burst
IO
SA
DA
DACK set to active-high
In the case of SA-DMA only, the (Tnop) cycle is inserted, and the DACKn signal is output as shown by the solid line. In a normal write, the (Tnop) cycle is
omitted and the DACKn signal is output as shown by the dotted line.
memory)
: Dack device
: Single address DMA transfer
: Dual address DMA transfer
Tnop
t
t
RASD
DACD
(Tnop)
t
CASD2
t
WDD
t
t
t
t
t
BSD
Tc1
CSD
DQMD
AD
RWD
H/L
c1
c1
t
t
t
t
Tc2
CASD2
RWD
WDD
BSD
Single address DMA
c2
(TRWL[2:0] = 010)
Tc3
Normal write
c3
Tc4
c4
Tc5
t
AD
H/L
c5
c5
Rev. 2.00 Feb. 12, 2010 Page 1257 of 1330
Tc6
c6
t
Tc7
DACD
c7
Tc8
c8
t
Trwl
t
t
CSD
AD
DQMD
REJ09B0554-0200
Trwl
t
DACD
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