D6417760BP200ADV Renesas Electronics America, D6417760BP200ADV Datasheet - Page 299

• Manufacturer Part Number: D6417760BP200ADV
• Description: IC SUPER H MPU ROMLESS 256BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of D6417760BP200ADV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

(2) IRL Interrupts
• Source: The interrupt mask level bits (IMASK3 to IMASK0) setting in SR is smaller than the
• Transition address: VBR + H'0000 0600
• Transition operations:
IRL()
{
}
IRL (3–0) level, and the BL bit in SR is 0 (accepted at instruction boundary).
The PC contents immediately after the instruction at which the interrupt is accepted are set in
SPC. The SR and R15 contents at the time of acceptance are set in SSR and SGR.
The code corresponding to the IRL (3–0) level is set in INTEVT. See table 9.7, for the
corresponding codes. The BL, MD, and RB bits are set to 1 in SR, and a branch is made to
VBR + H'0600. The acceptance level is not set in the interrupt mask level bits (IMASK3 to
IMASK0) in SR. When the BL bit in SR is 1, the interrupt is masked. For details, see section
9, Interrupt Controller (INTC).
SPC = PC;
SSR = SR;
SGR = R15;
INTEVT = H'0000 0200 – H'0000 03C0;
SR.MD = 1;
SR.RB = 1;
SR.BL = 1;
PC = VBR + H'0000 0600;
Rev. 2.00 Feb. 12, 2010 Page 215 of 1330
REJ09B0554-0200