D6417760BP200ADV Renesas Electronics America, D6417760BP200ADV Datasheet - Page 272
D6417760BP200ADV
Manufacturer Part Number
D6417760BP200ADV
Description
IC SUPER H MPU ROMLESS 256BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet
1.D6417760BP200ADV.pdf
(1418 pages)
Specifications of D6417760BP200ADV
Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D6417760BP200ADV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Exception
Category
Priority
Exception transition destination : Control passes to H'A000 0000 in a reset, and to [VBR + offset]
Exception code
IRL
Module/source
Notes: 1. When UBDE in BRCR = 1, PC = DBR. In other cases, PC = VBR + H'100.
Rev. 2.00 Feb. 12, 2010 Page 188 of 1330
REJ09B0554-0200
Interrupt
2. The priority order of external interrupts and peripheral module interrupts can be set by
3. IRQ is external interrupt.
Execution
Mode
Completion
type
software.
Exception
Peripheral
module
interrupt
(module/
source)
MMCIF
MFI
—
H-UDI
GPIO
ADC
CMT
TMU
WDT
REF
: Priority is first assigned by priority level, then by priority order
: Stored in EXPEVT for a reset or general exception, and in
: Interrupt request level (pins IRL3 to IRL0).
: See the sections on the relevant peripheral modules.
within each level (the lowest number represents the highest
priority). For details of the interrupt priority level, see section 9,
Interrupt Controller (INTC).
in other cases.
INTEVT for an interrupt.
TUNI0
RCMI
MMCI0 4
MMCI1
MMCI2
MMCI3
MFII
—
—
—
—
H-UDI
GPIOI
ADI
CMTI
TUNI1
TUNI2
TICPI2
ITI
ROVI
Priority
Level
Priority
Order
*
2
Vector
Address
(VBR)
Offset
H'600
Exception
Code
H'D00
H'D20
H'D40
H'D60
H'E80
H'F00
H'F20
H'F40
H'F60
H'600
H'620
H'F80
H'FA0
H'400
H'420
H'440
H'460
H'560
H'580
H'5A0
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