D6417760BP200ADV Renesas Electronics America, D6417760BP200ADV Datasheet - Page 404

• Manufacturer Part Number: D6417760BP200ADV
• Description: IC SUPER H MPU ROMLESS 256BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of D6417760BP200ADV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Figure 10.15 shows an example of the connection of 16M × 16-bit synchronous DRAMs.
(2) Address Multiplexing
Address multiplexing is performed so that synchronous DRAM can be connected without off-chip
multiplexing circuitry in accordance with the address multiplexing bits AMXEXT and AMX2 to
AMX0 in MCR. Table 10.16 shows the relationship between the address multiplexing bits and the
bits output on the address pins. The address signals output on address pins A25 to A18, A1, and
A0 are not guaranteed.
A0, which serves as the LSB of the synchronous DRAM address pin, specifies the longword
address connected to this LSI. Therefore, be sure to first connect pin A0 of the synchronous
DRAM to pin A2 of this LSI, and then connect pin A1 to pin A3.
Rev. 2.00 Feb. 12, 2010 Page 320 of 1330
REJ09B0554-0200
Figure 10.15 Connection Example of Synchronous DRAM with 32-Bit Data Width (Area 3)
SH7760
D31–D16
D15–D0
A11–A2
RD/WR
DQM3
DQM2
DQM1
DQM0
CKIO
CKE
RAS
CS3
RD
512k × 16-bit × 2-bank
synchronous DRAM
A9–A0
CLK
CKE
CS
RAS
CAS
WE
I/O15–I/O0
DQMU
DQML
A9–A0
CLK
CKE
CS
RAS
CAS
WE
I/O15–I/O0
DQMU
DQML