D6417760BP200ADV Renesas Electronics America, D6417760BP200ADV Datasheet - Page 1216

• Manufacturer Part Number: D6417760BP200ADV
• Description: IC SUPER H MPU ROMLESS 256BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of D6417760BP200ADV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

31.3
31.3.1
An instruction access is an access that obtains an instruction. For example, fetching an instruction
from the branch destination when a branch instruction is executed is an instruction access. An
operand access is any memory access for the purpose of instruction execution. For example, the
access to address (PC+disp×2+4) in the instruction MOV.W@(disp,PC), Rn is an operand access.
As the term “data” is used to distinguish data from an address, the term “operand access” is used
in this section.
All operand accesses are treated as either read accesses or write accesses. The following
instructions require special attention:
• PREF, OCBP, and OCBWB instructions: Treated as read accesses.
• MOVCA.L and OCBI instructions: Treated as write accesses.
• TAS.B instruction: Treated as one read access and one write access.
The operand accesses for the PREF, OCBP, OCBWB, and OCBI instructions are accesses with no
access data.
This LSI handles all operand accesses as having a data size. The data size can be byte, word,
longword, or quadword. The operand data size for the PREF, OCBP, OCBWB, MOVCA.L, and
OCBI instructions is treated as longword.
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REJ09B0554-0200
Bit
2, 1
0
Operation
Explanation of Terms Relating to Access
Bit Name
—
UBDE
Initial Value
All 0
0
R/W
R
R/W
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
User Break Debug Enable
Specifies whether the user break debug function is
used or not.
0: User break debug function is not used
1: User break debug function is used