D6417760BP200ADV Renesas Electronics America, D6417760BP200ADV Datasheet - Page 621

• Manufacturer Part Number: D6417760BP200ADV
• Description: IC SUPER H MPU ROMLESS 256BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of D6417760BP200ADV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

15.3.2
The TCOR registers are 32-bit readable/writable registers. When a TCNT counter underflows
while counting down, the TCOR value is set in that TCNT, which continues counting down from
the set value.
Initial value:
Initial value:
15.3.3
The TCNT registers are 32-bit readable/writable registers. Each TCNT counts down on the input
clock selected by the TPSC2 to TPSC0 bits in TCR.
When a TCNT counter underflows while counting down, the UNF flag is set in TCR of the
corresponding channel. At the same time, the TCOR value is set in TCNT, and the count-down
operation continues from the set value.
Initial value:
Initial value:
Bit
1
0
R/W:
R/W:
R/W:
R/W:
Bit:
Bit:
Bit:
Bit:
Bit Name
STR1
STR0
Timer Constant Register (TCORn) (n = 0 to 2)
Timer Counter (TCNTn) (n = 0 to 2)
R/W
R/W
R/W
R/W
31
15
31
15
1
1
1
1
R/W
R/W
R/W
R/W
30
14
30
14
1
1
1
1
R/W
R/W
R/W
R/W
29
13
29
13
1
1
1
1
Initial Value R/W
0
0
R/W
R/W
R/W
R/W
28
12
28
12
1
1
1
1
R/W
R/W
R/W
R/W
27
11
27
11
1
1
1
1
R/W
R/W
R/W
R/W
26
10
26
10
R/W
R/W
1
1
1
1
R/W
R/W
R/W
R/W
25
25
1
9
1
1
9
1
Description
Counter Start 1
Specifies whether TCNT1 is operated or stopped.
0: TCNT1 count operation is stopped
1: TCNT1 performs count operation
Counter Start 0
Specifies whether TCNT0 is operated or stopped.
0: TCNT0 count operation is stopped
1: TCNT0 performs count operation
R/W
R/W
R/W
R/W
24
24
1
8
1
1
8
1
R/W
R/W
R/W
R/W
23
23
1
7
1
1
7
1
Rev. 2.00 Feb. 12, 2010 Page 537 of 1330
R/W
R/W
R/W
R/W
22
22
1
6
1
1
6
1
R/W
R/W
R/W
R/W
21
21
1
5
1
1
5
1
R/W
R/W
R/W
R/W
20
20
1
4
1
1
4
1
R/W
R/W
R/W
R/W
19
19
1
3
1
1
3
1
REJ09B0554-0200
R/W
R/W
R/W
R/W
18
18
1
2
1
1
2
1
R/W
R/W
R/W
R/W
17
17
1
1
1
1
1
1
R/W
R/W
R/W
R/W
16
16
1
0
1
1
0
1