D6417760BP200ADV Renesas Electronics America, D6417760BP200ADV Datasheet - Page 1148

• Manufacturer Part Number: D6417760BP200ADV
• Description: IC SUPER H MPU ROMLESS 256BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of D6417760BP200ADV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Figure 30.1 shows a block diagram of LCDC.
Peripheral
30.2
Table 30.1 summarizes the LCDC's pin configuration.
Table 30.1 Pin Configuration
Note: Check the LCD module specifications carefully in section 30.5, Clock and LCD Data
Rev. 2.00 Feb. 12, 2010 Page 1064 of 1330
REJ09B0554-0200
Name
LCD_DATA15 to 0
LCD_DON
LCD_CL1
LCD_CL2
LCD_M_DISP
LCD_FLM
VCPWC
VEPWC
LCD_CLK
LCD_CLK
bus
Bck
Pck
Signal Examples, before deciding on the wiring specifications for the LCD module.
Input/Output Pins
4 bytes × 256 entries
I/O
Output
Output
Output
Output
Output
Output
Output
Input
Output
Pallet RAM
Register
Figure 30.1 LCDC Block Diagram
Shift-clock 1 (STN/DSTN)/horizontal sync signal (HSYNC) (TFT)
Shift-clock 2 (STN/DSTN)/dot clock (DOTCLK) (TFT)
Function
Data for LCD panel
Display-on signal (DON)
LCD current-alternating signal/DISP signal
First line marker/vertical sync signal (VSYNC) (TFT)
LCD-module power control (V
LCD-module power control (V
LCD clock-source input
DMABRG interface
DMABRG
generator
Clock
DOTCLK
LCDC
Power control
CC
EE
)
)
Line buffer
2.4 kbytes
LCD_CL1
LCD_CL2
LCD_FLM
LCD_DATA 15–0
LCD_DON
VCPWC
VEPWC
LCD_M_DISP