DF61657CN35FTV Renesas Electronics America, DF61657CN35FTV Datasheet - Page 94

IC H8SX/1657 MCU FLASH 120TQFP

DF61657CN35FTV

Manufacturer Part Number
DF61657CN35FTV
Description
IC H8SX/1657 MCU FLASH 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of DF61657CN35FTV

Core Processor
H8SX
Core Size
32-Bit
Speed
35MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
82
Program Memory Size
768KB (768K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
For Use With
3DK1657 - DEV EVAL KIT FOR H8SX/1657
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF61657CN35FTV
Manufacturer:
RENESAS
Quantity:
101
Part Number:
DF61657CN35FTV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 3 MCU Operating Modes
3.3
3.3.1
This is the user boot mode for the flash memory. The LSI operates in the same way as in mode 7
except for programming and erasing of the flash memory. For details, refer to section 18, Flash
Memory (0.18-µm F-ZTAT Version).
3.3.2
This is the boot mode for the flash memory. The LSI operates in the same way as in mode 7
except for programming and erasing of the flash memory. For details, refer to section 18, Flash
Memory (0.18-µm F-ZTAT Version).
3.3.3
The CPU operating mode is advanced mode in which the address space is 16 Mbytes, and the on-
chip ROM is disabled.
The initial bus width mode immediately after a reset is 16 bits, with 16-bit access to all areas.
Ports D, E, and F function as an address bus, ports H and I function as a data bus, and parts of
ports A and B function as bus control signals. However, if all areas are designated as an 8-bit
access space by the bus controller, the bus mode switches to eight bits, and only port H functions
as a data bus.
3.3.4
The CPU operating mode is advanced mode in which the address space is 16 Mbytes, and the on-
chip ROM is disabled.
The initial bus width mode immediately after a reset is eight bits, with 8-bit access to all areas.
Ports D, E, and F function as an address bus, port H functions as a data bus, and parts of ports A
and B function as bus control signals. However, if any area is designated as a 16-bit access space
by the bus controller, the bus width mode switches to 16 bits, and ports H and I function as a data
bus.
Rev. 2.00 Jun. 28, 2007 Page 68 of 864
REJ09B0341-0200
Operating Mode Descriptions
Mode 1
Mode 2
Mode 4
Mode 5

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