DF61657CN35FTV Renesas Electronics America, DF61657CN35FTV Datasheet - Page 156

• Manufacturer Part Number: DF61657CN35FTV
• Description: IC H8SX/1657 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61657CN35FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 35MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 768KB (768K x 8)
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: 3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 6 Bus Controller (BSC)
• Idle cycle insertion
• Write buffer function
• External bus release function
• Bus arbitration function
• Multi-clock function
• The bus start (BS) and read/write (RD/WR) signals can be output.
Rev. 2.00 Jun. 28, 2007 Page 130 of 864
REJ09B0341-0200
Idle cycles can be inserted between external read accesses to different areas
Idle cycles can be inserted before the external write access after an external read access
Idle cycles can be inserted before the external read access after an external write access
Idle cycles can be inserted before the external access after a DMAC single address transfer
(write access)
External write cycles and internal accesses can be executed in parallel
Write accesses to the on-chip peripheral module and on-chip memory accesses can be executed
in parallel
DMAC single address transfers and internal accesses can be executed in parallel
Includes a bus arbiter that arbitrates bus mastership among the CPU, DMAC, and DTC
The internal peripheral functions can be operated in synchronization with the peripheral
module clock (Pφ). Accesses to the external address space can be operated in synchronization
with the external bus clock (Bφ).