DF61657CN35FTV Renesas Electronics America, DF61657CN35FTV Datasheet - Page 623

IC H8SX/1657 MCU FLASH 120TQFP

DF61657CN35FTV

Manufacturer Part Number
DF61657CN35FTV
Description
IC H8SX/1657 MCU FLASH 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of DF61657CN35FTV

Core Processor
H8SX
Core Size
32-Bit
Speed
35MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
82
Program Memory Size
768KB (768K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
For Use With
3DK1657 - DEV EVAL KIT FOR H8SX/1657
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Quantity
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Part Number:
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Manufacturer:
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Part Number:
DF61657CN35FTV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
14.5.2
Figure 14.13 shows a sample flowchart for multiprocessor serial data reception. If the MPIE bit in
SCR is set to 1, data is skipped until data with a 1 multiprocessor bit is sent. On receiving data
with a 1 multiprocessor bit, the receive data is transferred to RDR. An RXI interrupt request is
generated at this time. All other SCI operations are the same as in asynchronous mode. Figure
14.12 shows an example of SCI operation for multiprocessor format reception.
MPIE
RDRF
RDR
value
MPIE
RDRF
RDR
value
Multiprocessor Serial Data Reception
1
1
Start
bit
Start
bit
0
0
(Example with 8-Bit Data, Multiprocessor Bit, One Stop Bit)
MPIE = 0
MPIE = 0
D0
D0
Figure 14.12 Example of SCI Operation for Reception
ID1
D1
D1
Data (ID1)
Data (ID2)
RXI interrupt
request
(multiprocessor
interrupt)
generated
RXI interrupt
request
(multiprocessor
interrupt)
generated
D7
D7
(a) Data does not match station's ID
(b) Data matches station's ID
MPB
MPB
1
1
RDR data read and
RDRF flag cleared
to 0 in RXI interrupt
processing routine
RDR data read
and RDRF flag
cleared to 0 in
RXI interrupt
processing routine
Stop
bit
Stop
bit
1
1
Start
bit
Start
bit
0
0
Section 14 Serial Communication Interface (SCI)
D0
D0
If not this station's ID,
MPIE bit is set to 1
again
Matches this station's ID,
so reception continues, and
data is received in RXI
interrupt processing routine
D1
D1
Data (Data 1)
Data (Data 2)
Rev. 2.00 Jun. 28, 2007 Page 597 of 864
ID2
ID1
D7
D7
MPB
MPB
0
0
RXI interrupt request is
not generated, and RDR
retains its state
Stop
bit
Stop
bit
1
1
MPIE bit set to 1
again
REJ09B0341-0200
Idle state
(mark state)
Idle state
(mark state)
Data 2
1
1

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