DF61657CN35FTV Renesas Electronics America, DF61657CN35FTV Datasheet - Page 25

• Manufacturer Part Number: DF61657CN35FTV
• Description: IC H8SX/1657 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61657CN35FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 35MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 768KB (768K x 8)
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: 3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

19.2 Oscillator............................................................................................................................ 749
19.3 PLL Circuit ........................................................................................................................ 750
19.4 Frequency Divider ............................................................................................................. 751
19.5 Usage Notes ....................................................................................................................... 751
Section 20 Power-Down Modes ........................................................................755
20.1 Features.............................................................................................................................. 755
20.2 Register Descriptions ......................................................................................................... 757
20.3 Multi-Clock Function......................................................................................................... 765
20.4 Module Stop Function........................................................................................................ 765
20.5 Sleep Mode ........................................................................................................................ 765
20.6 All-Module-Clock-Stop Mode ........................................................................................... 767
20.7 Software Standby Mode..................................................................................................... 768
20.8 Hardware Standby Mode ................................................................................................... 772
20.9 Sleep Instruction Exception Handling ............................................................................... 774
20.10 Bφ Clock Output Control ................................................................................................... 777
20.11 Usage Notes ....................................................................................................................... 778
19.1.1 System Clock Control Register (SCKCR) ............................................................ 746
19.2.1 Connecting Crystal Resonator .............................................................................. 749
19.2.2 External Clock Input............................................................................................. 750
19.5.1 Notes on Clock Pulse Generator ........................................................................... 751
19.5.2 Notes on Resonator............................................................................................... 752
19.5.3 Notes on Board Design ......................................................................................... 753
20.2.1 Standby Control Register (SBYCR) ..................................................................... 758
20.2.2 Module Stop Control Registers A and B (Function and MSTPCRB)................... 761
20.2.3 Module Stop Control Register C (MSTPCRC)..................................................... 764
20.5.1 Transition to Sleep Mode...................................................................................... 765
20.5.2 Clearing Sleep Mode ............................................................................................ 766
20.7.1 Transition to Software Standby Mode .................................................................. 768
20.7.2 Clearing Software Standby Mode ......................................................................... 768
20.7.3 Setting Oscillation Settling Time after Clearing Software Standby Mode ........... 769
20.7.4 Software Standby Mode Application Example..................................................... 771
20.8.1 Transition to Hardware Standby Mode ................................................................. 772
20.8.2 Clearing Hardware Standby Mode........................................................................ 772
20.8.3 Hardware Standby Mode Timing.......................................................................... 772
20.8.4 Timing Sequence at Power-On ............................................................................. 773
20.11.1 I/O Port Status....................................................................................................... 778
20.11.2 Current Consumption during Oscillation Settling Standby Period ....................... 778
20.11.3 Module Stop of DMAC or DTC ........................................................................... 778
20.11.4 On-Chip Peripheral Module Interrupts ................................................................. 778
Rev. 2.00 Jun. 28, 2007 Page xxiii of xxiv