DF61657CN35FTV Renesas Electronics America, DF61657CN35FTV Datasheet - Page 464

• Manufacturer Part Number: DF61657CN35FTV
• Description: IC H8SX/1657 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61657CN35FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 35MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 768KB (768K x 8)
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: 3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 10 16-Bit Timer Pulse Unit (TPU)
10.3.5
TSR indicates the status of each channel. The TPU has six TSR registers, one for each channel.
Rev. 2.00 Jun. 28, 2007 Page 438 of 864
REJ09B0341-0200
Bit
7
6
5
Bit
Bit Name
Initial Value
R/W
Note:
* Only 0 can be written to bits 5 to 0, to clear flags.
Bit Name
TCFD

TCFU
Timer Status Register (TSR)
TCFD
R
7
1
Initial
value
1
1
0

R
6
1
R/W
R
R
R/(W)* Underflow Flag
R/(W)*
TCFU
5
0
Count Direction Flag
Status flag that shows the direction in which TCNT counts
in channels 1, 2, 4, and 5.
In channels 0 and 3, bit 7 is reserved. It is always read as
1 and cannot be modified.
0: TCNT counts down
1: TCNT counts up
Reserved
This is a read-only bit and cannot be modified.
Status flag that indicates that a TCNT underflow has
occurred when channels 1, 2, 4, and 5 are set to phase
counting mode.
In channels 0 and 3, bit 5 is reserved. It is always read as
0 and cannot be modified.
[Setting condition]
•
[Clearing condition]
•
Description
When the TCNT value underflows (changes from
H'0000 to H'FFFF)
When a 0 is written to TCFU after reading TCFU = 1
(When the CPU is used to clear this flag by writing 0
while the corresponding interrupt is enabled, be sure
to read the flag after writing 0 to it.)
R/(W)*
TCFV
4
0
R/(W)*
TGFD
3
0
R/(W)*
TGFC
2
0
R/(W)*
TGFB
1
0
R/(W)*
TGFA
0
0