DF61657CN35FTV Renesas Electronics America, DF61657CN35FTV Datasheet - Page 157

• Manufacturer Part Number: DF61657CN35FTV
• Description: IC H8SX/1657 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61657CN35FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 35MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 768KB (768K x 8)
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: 3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

A block diagram of the bus controller is shown in figure 6.1.
DMAC bus mastership acknowledge signal
CPU bus mastership acknowledge signal
DTC bus mastership acknowledge signal
DMAC bus mastership request signal
CPU bus mastership request signal
[Legend]
DTC bus mastership request signal
ABWCR:
ASTCR:
WTCRA:
WTCRB:
RDNCR:
CSACR:
Bus width control register
Access state control register
Wait control register A
Wait control register B
Read strobe timing control register
CS assertion period control register
Internal data bus
Internal bus
control signals
DMAC address bus
CPU address bus
DTC address bus
Figure 6.1 Block Diagram of Bus Controller
Control register
Internal
arbiter
bus
Internal bus
control unit
Address
selector
ABWCR
WTCRA
WTCRB
RDNCR
ASTCR
CSACR
IDLCR:
BCR1:
BCR2:
ENDIANCR:
SRAMCR:
BROMCR:
MPXCR:
Idle control register
Bus control register 1
Bus control register 2
Endian control register
SRAM mode control register
Burst ROM interface control register
Address/data multiplexed I/O control register
Rev. 2.00 Jun. 28, 2007 Page 131 of 864
BCR2
Area decoder
External bus
External bus
control unit
BROMCR
SRAMCR
MPXCR
IDLCR
BCR1
arbiter
Section 6 Bus Controller (BSC)
ENDIANCR
REJ09B0341-0200
CS7 to CS0
External bus
control signals
WAIT
BREQ
BACK
BREQO