DF61657CN35FTV Renesas Electronics America, DF61657CN35FTV Datasheet - Page 798
DF61657CN35FTV
Manufacturer Part Number
DF61657CN35FTV
Description
IC H8SX/1657 MCU FLASH 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet
1.DF61656N35FTV.pdf
(894 pages)
Specifications of DF61657CN35FTV
Core Processor
H8SX
Core Size
32-Bit
Speed
35MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
82
Program Memory Size
768KB (768K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
For Use With
3DK1657 - DEV EVAL KIT FOR H8SX/1657
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Section 20 Power-Down Modes
20.8
20.8.1
When the STBY pin is driven low, a transition is made to hardware standby mode from any mode.
In hardware standby mode, all functions enter the reset state and stop operation, resulting in a
significant reduction in power consumption. As long as the prescribed voltage is supplied, on-chip
RAM data is retained. I/O ports are set to the high-impedance state.
In order to retain on-chip RAM data, the RAME bit in SYSCR should be cleared to 0 before
driving the STBY pin low. Do not change the state of the mode pins (MD2 to MD0) while this
LSI is in hardware standby mode.
20.8.2
Hardware standby mode is cleared by means of the STBY pin and the RES pin. When the STBY
pin is driven high while the RES pin is low, the reset state is entered and clock oscillation is
started. Ensure that the RES pin is held low until clock oscillation settles (for details on the
oscillation settling time, refer to table 20.2). When the RES pin is subsequently driven high, a
transition is made to the program execution state via the reset exception handling state.
20.8.3
Figure 20.3 shows an example of hardware standby mode timing.
When the STBY pin is driven low after the RES pin has been driven low, a transition is made to
hardware standby mode. Hardware standby mode is cleared by driving the STBY pin high,
waiting for the oscillation settling time, then changing the RES pin from low to high.
Rev. 2.00 Jun. 28, 2007 Page 772 of 864
REJ09B0341-0200
Oscillator
RES
STBY
Hardware Standby Mode
Transition to Hardware Standby Mode
Clearing Hardware Standby Mode
Hardware Standby Mode Timing
Figure 20.3 Hardware Standby Mode Timing
settling time
Oscillation
Reset exception
handling
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