DF61657CN35FTV Renesas Electronics America, DF61657CN35FTV Datasheet - Page 146

• Manufacturer Part Number: DF61657CN35FTV
• Description: IC H8SX/1657 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61657CN35FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 35MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 768KB (768K x 8)
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: 3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 5 Interrupt Controller
Figure 5.6 shows a block diagram of the DTC, DMAC, and interrupt controller.
(1)
The activation source for each DMAC channel is selected by DMRSR. The selected activation
source is input to the DMAC through the select circuit. When transfer by an on-chip module
interrupt is enabled (DTF1 = 1, DTF0 = 0, and DTE = 1 in DMDR) and the DTA bit in DMDR is
set to 1, the interrupt source selected for the DMAC activation source is controlled by the DMAC
and cannot be used as a DTC activation source or CPU interrupt source.
Interrupt sources that are not controlled by the DMAC are set for DTC activation sources or CPU
interrupt sources by the DTCE bit in DTCERA to DTCERH of the DTC.
Specifying the DISEL bit in MRB of the DTC generates an interrupt request to the CPU by
clearing the DTCE bit to 0 after the individual DTC data transfer.
Note that when the DTC performs a predetermined number of data transfers and the transfer
counter indicates 0, an interrupt request is made to the CPU by clearing the DTCE bit to 0 after the
DTC data transfer.
Rev. 2.00 Jun. 28, 2007 Page 120 of 864
REJ09B0341-0200
peripheral
On-chip
interrupt
module
IRQ
Selection of Interrupt Sources
Figure 5.6 Block Diagram of DTC, DMAC, and Interrupt Controller
Interrupt request
Interrupt request clear signal
Interrupt request
Interrupt request
clear signal
Interrupt controller
DMAC
select
circuit
Interrupt request
Select signal
Clear signal
DMRSR_0 to DMRSR_3
DTC/CPU
DTCER
select
circuit
Select signal
Clear signal
DMAC activation request signal
Control signal
Clear signal
determination
DTC control
Priority
circuit
CPU interrupt request
DTC activation request
vector number
vector number
Clear signal
I, I2 to I0
DMAC
DTC
CPU