IPTR-DSPBUILDER Altera, IPTR-DSPBUILDER Datasheet - Page 82

• Manufacturer Part Number: IPTR-DSPBUILDER
• Description: DSP BUILDER SOFTWARE
• Manufacturer: Altera
• Type: DSPr

Specifications of IPTR-DSPBUILDER

• Function: DSP Builder
• License: Renewal License
• Software Application: IP CORE, DSP BUILDER
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: Not applicable / Not applicable

4–10
Performing RTL Simulation
DSP Builder Standard Blockset User Guide
Figure 4–7. Signal Compiler Dialog Box
4. Click Compile.
5. When the compilation has completed successfully, click OK.
To perform RTL simulation with the ModelSim software, add a TestBench block.
Follow these steps:
1. Select the AltLab library from the Altera DSP Builder BlockSet folder in the
2. Drag and drop a TestBench block into your model.
3. Double-click on the new TestBench block. The TestBench Generator dialog box
Simulink Library Browser.
appears
(Figure
4–8).
Preliminary
Chapter 4: Using MegaCore Functions
MegaCore Function Design Example
© June 2010 Altera Corporation