IPTR-DSPBUILDER Altera, IPTR-DSPBUILDER Datasheet - Page 116

• Manufacturer Part Number: IPTR-DSPBUILDER
• Description: DSP BUILDER SOFTWARE
• Manufacturer: Altera
• Type: DSPr

Specifications of IPTR-DSPBUILDER

• Function: DSP Builder
• License: Renewal License
• Software Application: IP CORE, DSP BUILDER
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: Not applicable / Not applicable

7–8
Figure 7–5. Avalon-MM Read FIFO Content
Avalon-MM Interface Blocks Design Example
Adding Avalon-MM Blocks to the Design Example
DSP Builder Standard Blockset User Guide
The Avalon-MM Read Data Converter block handles caching and conversion of
Simulink or MATLAB data into accesses over the Avalon-MM interface. You can use
this block to test the functionality of your design. The Avalon-MM Read Data
Converter is simulation only and does not synthesize to HDL.
This tutorial describes how to interface a design using the Avalon-MM Blocks as a
custom peripheral to the Nios II embedded processor in SOPC Builder.
The design consists of a 4-tap FIR filter with variable coefficients. You load the
coefficients with the Nios II embedded processor while an off-chip source supplies the
input data through an analog-to-digital converter. The design sends filtered output
data off-chip through a digital-to-analog converter.
To complete the design example, follow these steps:
1. Click Open on the File menu in the MATLAB software.
2. Browse to the <DSP Builder install path>\DesignExamples\Tutorials\
SOPCBuilder\SOPCBlock directory.
Preliminary
Avalon-MM Interface Blocks Design Example
Chapter 7: Using the Interfaces Library
© June 2010 Altera Corporation