IPTR-DSPBUILDER Altera, IPTR-DSPBUILDER Datasheet - Page 106

• Manufacturer Part Number: IPTR-DSPBUILDER
• Description: DSP BUILDER SOFTWARE
• Manufacturer: Altera
• Type: DSPr

Specifications of IPTR-DSPBUILDER

• Function: DSP Builder
• License: Renewal License
• Software Application: IP CORE, DSP BUILDER
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: Not applicable / Not applicable

6–8
DSP Builder Standard Blockset User Guide
3. Press switch SW4 on the DSP development board to trigger the SignalTap II logic
4. Click OK in the SignalTap II Logic Analyzer dialog box when you finish.
Figure 6–5. MATLAB Plot for SignalTap II Node firstandout
Figure 6–6. MATLAB Plot for SignalTap II Node secondandout
analyzer.
1
DSP Builder interprets the captured data as unsigned values and displays them in
MATLAB plots. It stores the values in MATLAB .mat files in the working directory.
Figure 6–5
Figure 6–6
Figure 6–7
If you press and hold switch SW2 or SW3 while pressing switch SW4, the
trigger condition is not met and acquisition does not occur.
shows the MATLAB plot for the SignalTap II node firstandout.
shows the MATLAB plot for the SignalTap II node secondandout.
shows the MATLAB plot for the SignalTap II node cntout.
Preliminary
Chapter 6: Performing SignalTap II Logic Analysis
© June 2010 Altera Corporation
SignalTap II Example Designs