IPTR-DSPBUILDER Altera, IPTR-DSPBUILDER Datasheet - Page 103

• Manufacturer Part Number: IPTR-DSPBUILDER
• Description: DSP BUILDER SOFTWARE
• Manufacturer: Altera
• Type: DSPr

Specifications of IPTR-DSPBUILDER

• Function: DSP Builder
• License: Renewal License
• Software Application: IP CORE, DSP BUILDER
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: Not applicable / Not applicable

Chapter 6: Performing SignalTap II Logic Analysis
SignalTap II Example Designs
Specifying the Nodes to Analyze
© June 2010 Altera Corporation
Table 6–1. Parameters for the Pulse Generator Blocks
9. Select the Simulink Sinks library. Drag and drop a Terminator block near to the
To add SignalTap II Node blocks to the signals (also called nodes) that you want
to analyze (in this tutorial they are the output of each AND gate and the output of the
incrementer), follow these steps:
1. Open the AltLab library in the Simulink Library Browser. Drag a SignalTap II
Parameter
Pulse type
Time
Amplitude
Period
Pulse Width
Phase delay
Interpret vector parameters as 1-D
OR_Gate block and connect it to this block.
Node block into your design. Position the block so that it is on top of the
connection line between the AND_Gate1 block and the OR_Gate block
(Figure
1
If you position the block with this method, the Simulink software inserts
the block and joins connection lines on both sides.
6–4).
Preliminary
Value
Time based
Use Simulation time
1
2
50
0
On
DSP Builder Standard Blockset User Guide
6–5