IPTR-DSPBUILDER Altera, IPTR-DSPBUILDER Datasheet - Page 114

• Manufacturer Part Number: IPTR-DSPBUILDER
• Description: DSP BUILDER SOFTWARE
• Manufacturer: Altera
• Type: DSPr

Specifications of IPTR-DSPBUILDER

• Function: DSP Builder
• License: Renewal License
• Software Application: IP CORE, DSP BUILDER
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: Not applicable / Not applicable

7–6
Figure 7–3. Example System with Avalon-MM Write FIFO and Avalon-MM Read FIFO Blocks
DSP Builder Standard Blockset User Guide
1
Figure 7–3
Avalon-MM Read FIFO blocks.
Avalon-MM Write FIFO
An Avalon-MM Write FIFO has the following ports:
■
■
■
■
■
Double-click on an Avalon-MM Write FIFO block to open the Block Parameters
dialog box so that you can set parameters for the data type, data width and FIFO
depth.
To open the hierarchy below the Avalon-MM Write FIFO block, right-click the
block and click Look Under Mask on the pop-up menu.
You can use this design as a template to design new functionality (for example, when
you use an Avalon-MM address input to split incoming streams).
TestData (input). Connect this port to a Simulink block that provides simulation
data to the Avalon-MM Write FIFO. The data passes to the DataOut port one cycle
after the Ready input port asserts.
Stall (input). Connect this port to a Simulink block. It simulates stall conditions
of the Avalon-MM bus and hence underflow to the SOPC Builder component. For
any simulation cycle where Stall asserts, the Avalon-MM Write Test Converter
caches the test data and releases in order, one sample per clock, when stall is
de-asserted.
Ready (input). Connect this port to a DSP Builder block. It indicates that the
downstream hardware is ready for data.
DataOut (output). Connect this port to a DSP Builder block that corresponds to
the oldest unsent data sample received on the TestData port.
DataValid (output). Connect this port to a DSP Builder block and assert
whenever DataOut corresponds to real data.
shows an example system with Avalon-MM Write FIFO and
Preliminary
Chapter 7: Using the Interfaces Library
© June 2010 Altera Corporation
Avalon-MM Interface Blocks