IPTR-DSPBUILDER Altera, IPTR-DSPBUILDER Datasheet - Page 221

• Manufacturer Part Number: IPTR-DSPBUILDER
• Description: DSP BUILDER SOFTWARE
• Manufacturer: Altera
• Type: DSPr

Specifications of IPTR-DSPBUILDER

• Function: DSP Builder
• License: Renewal License
• Software Application: IP CORE, DSP BUILDER
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: Not applicable / Not applicable

Chapter 2: Arithmetic Library
DSP
Table 2–20. DSP Block Parameters (Part 1 of 2)
© June 2010 Altera Corporation
Number of Multipliers
Bus Type
a Inputs [number of bits].[] >= 0
a Inputs [].[number of bits] >= 0
b Inputs [number of bits].[] >= 0
b Inputs [].[number of bits] >= 0
Connect Multiplier Input a
to shiftin
Use Shiftout from a Input
of Last Multiplier
Output Operation on First
Multiplier Pair
Output Operation on
Second Multiplier Pair
Enable Accumulator Mode
Accumulator Direction
Use Accumulator
Synchronous Load Input
Use Chainout Adder Input
(chainin)
Use Chainout Adder Output
(chainout)
Use Zero Chainout Input
Full Resolution for Output
Result
Output [number of bits].[]
Output [].[number of bits]
Output Rounding Operation
Type
Name
Table 2–20
1, 2, 3, 4
Signed Integer,
Unsigned Integer,
Signed Fractional
(Parameterizable)
(Parameterizable)
(Parameterizable)
(Parameterizable)
On or Off
On or Off
ADD, SUB
ADD, SUB
On or Off
On or Off
On or Off
On or Off
On or Off
On or Off
>= 0
(Parameterizable)
>= 0
(Parameterizable)
None (truncate),
Nearest Integer,
Nearest Even
ADD, SUB
Value
shows the DSP block parameters.
The number of multipliers you want to feed the adder.
The number format you want to use for the bus.
Specify the number of data a input bits to the left of the binary point,
including the sign bit.
Specify the number of data a input bits to the right of the binary point.
This option applies only to signed fractional formats.
Specify the number of data b input bits to the left of the binary point,
including the sign bit.
Specify the number of data b input bits to the right of the binary point.
This option applies only to signed fractional formats.
Turn on to connect the multiplier input a to shiftin from the previous
multiplier. The design uses separate inputs for each multiplier.)
Turn on to create a shiftouta output from the a input of the last
multiplier.
Add or subtract the product of the first multiplier pair.
Add or subtract the product of the second multiplier pair.
Turn on to enable accumulator mode. When this option is on, you can
select the accumulator direction and use the optional accum_sload
input.
Add or subtract values in the accumulator.
Turn on to use the optional accum_sload input.
Turn on to use the chainin input for the chainout adder to add the
result from a previous stage. This option is available only if the input bit
widths are less than or equal to 18 and the number of multipliers is 4.
Turn on to use the chainout output from the chainout adder output
instead of the res output. This option is available only if the input bit
widths are less than or equal to 18 and the number of multipliers is 4.
Turn on to use the zero_chainout input, which dynamically sets the
chainout value to zero.
When on, the multiplier output bit width is full resolution. When off, you
can specify a different output width. Rounding and saturation are
available for certain input/output type combinations.
Specify the number of data output bits to the left of the binary point,
including the sign bit.
Specify the number of data output bits to the right of the binary point.
This option applies only to signed fractional formats.
You can disable rounding (truncate), round to the nearest integer or
round to the nearest even.
Preliminary
Description
DSP Builder Standard Blockset Libraries
2–13