IPTR-DSPBUILDER Altera, IPTR-DSPBUILDER Datasheet - Page 196

• Manufacturer Part Number: IPTR-DSPBUILDER
• Description: DSP BUILDER SOFTWARE
• Manufacturer: Altera
• Type: DSPr

Specifications of IPTR-DSPBUILDER

• Function: DSP Builder
• License: Renewal License
• Software Application: IP CORE, DSP BUILDER
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: Not applicable / Not applicable

1–6
Table 1–5. HDL Import Block Parameters (Part 2 of 2)
DSP Builder Standard Blockset Libraries
Sort top-level
ports by name
Compile
1
On or Off
Figure 1–1
adder with four input ports (Input, Input1, Input2, sclrp), and two output ports
(Output, Output1).
Figure 1–1. Typical HDL Import Block
Use std_logic_1164 types to define the input and output interfaces to the imported
VHDL. If your design uses any other VHDL type definitions (such as arithmetic or
numeric types), you should write a wrapper that converts them to std_logic or
std_logic_vector.
HDL import only supports single clock designs. If you import a design with multiple
clocks, DSP Builder uses one clock as the implicit clock and shows any others as input
ports on the Simulink block.
Store HDL source files in any directory or hierarchy of directories.
Table 1–6
Table 1–6. Supported Megafunctions and LPM Functions
Table 1–7 on page 1–7
supported.
a_graycounter
altaccumulate
altmult_add
altshift_taps
Note to
(1) The lpm_mult LPM function is not supported when configured to perform a squaring operation.
—
Table
lists the supported megafunctions and LPM functions.
shows an example of an imported HDL design implementing a simple
Turn on to sort the ports that the top-level HDL file alphabetically defines instead of the
order specified in the HDL.
Compiles a simulation model from the imported HDL and displays the ports defined in
the imported HDL on the block.
1–6:
Megafunctions
lists the megafunctions and LPM functions that are not
altsyncram
parallel_add
scfifo
Preliminary
lpm_abs
lpm_add_sub
lpm_compare
lpm_counter
LPM Functions
© June 2010 Altera Corporation
lpm_mult
lpm_mux
lpm_ram_dp
Chapter 1: AltLab Library
(Note 1)
HDL Import