MT46V32M4TG-6T:D TR Micron Technology Inc, MT46V32M4TG-6T:D TR Datasheet - Page 89

• Manufacturer Part Number: MT46V32M4TG-6T:D TR
• Description: IC DDR SDRAM 128MBIT 6NS 66TSOP
• Manufacturer: Micron Technology Inc

Specifications of MT46V32M4TG-6T:D TR

• Format - Memory: RAM
• Memory Type: DDR SDRAM
• Memory Size: 128M (32Mx4)
• Speed: 6ns
• Interface: Parallel
• Voltage - Supply: 2.3 V ~ 2.7 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 66-TSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 557-1024-2

Figure 51:
09005aef8074a655
128MBDDRx4x8x16_2.fm - Rev. J 4/05 EN
x4: A0-A9, A11
x16: A9, A11
COMMAND
x16: A0-A8
x8: A0-A9
BA0, BA1
x8: A11
DQS
DQ
CK#
CKE
A10
DM
CK
1
5
Bank Write - Without Auto Precharge
t
t
IS
IS
NOP 6
T0
t
t
IH
IH
Notes: 1. DIn = data-in. from column n; subsequent elements are provided in the programmed
t
t
Bank x
IS
IS
2. Burst length = 4 in the case shown.
3. Disable auto precharge.
4. “Don’t Care” if A10 is HIGH at T8.
5. PRE = PRECHARGE, ACT = ACTIVE, RA = Row Address, BA = Bank Address.
6. NOP commands are shown for ease of illustration; other commands may be valid at these
7. See Figure 45, Initialize and Load Mode Registers, on page 83 for detailed DQ timing.
8. Although not requird by the Micron device, JEDEC specifies that DQS be a valid HIGH, LOW
ACT
RA
T1
RA
RA
t
t
order.
times.
or some point on a valid transition on or before this clock edge (T3n).
IH
IH
t
CK
t
t
RCD
RAS
NOP 6
T2
t
CH
t
CL
WRITE 2
t
Bank x
Col n
IS
3
T3
t
t
DQSS (NOM)
IH
t
WPRES
T3n
89
8
t DS
t
WPRE
NOP 6
T4
DI
b
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t DH
T4n
t
DQSL
NOP 6
128Mb: x4, x8, x16 DDR SDRAM
T5
t
DQSH
T5n
t
WPST
DON’T CARE
NOP 6
T6
©2000 Micron Technology, Inc. All rights reserved.
Timing Diagrams
t
WR
NOP 6
T7
TRANSITIONING DATA
ALL BANKS
ONE BANK
Bank x 4
T8
PRE
t
RP