MT46V32M4TG-6T:D TR Micron Technology Inc, MT46V32M4TG-6T:D TR Datasheet - Page 88

IC DDR SDRAM 128MBIT 6NS 66TSOP

MT46V32M4TG-6T:D TR

Manufacturer Part Number
MT46V32M4TG-6T:D TR
Description
IC DDR SDRAM 128MBIT 6NS 66TSOP
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT46V32M4TG-6T:D TR

Format - Memory
RAM
Memory Type
DDR SDRAM
Memory Size
128M (32Mx4)
Speed
6ns
Interface
Parallel
Voltage - Supply
2.3 V ~ 2.7 V
Operating Temperature
0°C ~ 70°C
Package / Case
66-TSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
557-1024-2
Figure 50:
09005aef8074a655
128MBDDRx4x8x16_2.fm - Rev. J 4/05 EN
x4: A0-A9, A11
x16: A9, A11
COMMAND
x16: A0-A8
x8: A0-A9
BA0, BA1
Case 1:
Case 2:
x8: A11
DQS
DQ
DQS
DQ
CK#
CKE
A10
DM
CK
1
1
4
t
t
AC (MIN) and
AC (MAX) and
Bank Read - With Auto Precharge
t
t
IS
IS
NOP 5
T0
Notes: 1. DOn = data-out from column n; subsequent elements are provided in the programmed
t
IH
t
t
IH
DQSCK (MIN)
t
DQSCK (MAX)
2. Burst length = 4 in the case shown.
3. Enable auto precharge.
4. ACT = ACTIVE, RA = Row Address, BA = Bank Address.
5. NOP commands are shown for ease of illustration; other commands may be valid at these
6. The READ command can only be applied at T3 if
7.
8. Refer to Figure 40 on page 77, Figure 41 on page 78, and Figure 42 on page 79 for
IS
Bank x
t
IS
ACT
T1
RA
RA
RA
order.
times.
t
detailed DQS and DQ timing.
RP starts only after
IH
t
IH
t
CK
t
t
RCD,
RAS
t
RC
NOP 5
T2
t
RAP 6
t
CH
t
t
RAS has been satisfied.
CL
t
READ 2,6
IS
Bank x
3
Col n
T3
t
IH
88
CL = 2
t
LZ
(MIN)
NOP 5
T4
t
RPRE
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
LZ (MIN)
t
RPRE
128Mb: x4, x8, x16 DDR SDRAM
NOP 5
T5
t
DQSCK (MIN)
t
DO
t
RAP is satisfied at T3.
n
DQSCK (MAX)
t
AC (MIN)
DO
t
n
AC (MAX)
T5n
t
RP 7
DON’T CARE
NOP 5
T6
©2000 Micron Technology, Inc. All rights reserved.
t
HZ (MAX)
T6n
t
RPST
Timing Diagrams
t
RPST
NOP 5
T7
TRANSITIONING DATA
Bank x
T8
ACT
RA
RA
RA

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