MT46V32M4TG-6T:D TR Micron Technology Inc, MT46V32M4TG-6T:D TR Datasheet - Page 81

IC DDR SDRAM 128MBIT 6NS 66TSOP

MT46V32M4TG-6T:D TR

Manufacturer Part Number
MT46V32M4TG-6T:D TR
Description
IC DDR SDRAM 128MBIT 6NS 66TSOP
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT46V32M4TG-6T:D TR

Format - Memory
RAM
Memory Type
DDR SDRAM
Memory Size
128M (32Mx4)
Speed
6ns
Interface
Parallel
Voltage - Supply
2.3 V ~ 2.7 V
Operating Temperature
0°C ~ 70°C
Package / Case
66-TSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
557-1024-2
Initialization
09005aef8074a655
128MBDDRx4x8x16_2.fm - Rev. J 4/05 EN
10. Wait at least
11. Using the LMR command program the mode register to set operating parameters and
12. Wait at least
13. Issue a PRECHARGE ALL command.
14. Wait at least
15. Issue an AUTO REFRESH command (Note this may be moved prior to step 13).
16. Wait at least
17. Issue an AUTO REFRESH command (Note this may be moved prior to step 13).
18. Wait at least
19. Although not required by the Micron device, JEDEC requires a LMR command to clear
20. Wait at least
21. At this point the DRAM is ready for any valid command. Note 200 clock cycles are
1. Simultaneously apply power to V
2. Apply V
3. Assert and hold CKE at a LVCMOS logic low.
4. Provide stable CLOCK signals.
5. Wait at least 200µs.
6. Bring CKE high and provide at least one NOP or DESELECT command. At this point
7. Perform a PRECHARGE ALL command.
8. Wait at least
9. Using the LMR command program the Extended Mode Register (E0 = 0 to enable the
To ensure device operation the DRAM must be initialized as described below:
the CKE input changes from a LVCMOS input to a SSTL2 input only and will remain a
SSTL_2 input unless a power cycle occurs.
DLL and E1 = 0 for normal drive or E1 = 1 for reduced drive, E2 through En must be set
to 0; where n = most significant bit).
to reset the DLL. Note at least 200 clock cycles are required between a DLL reset and
any READ command.
the DLL bit (set M8 = 0). If a LMR command is issued the same operating parameters
should be utilized as in step 11.
required between step 11 (DLL Reset) and any READ command.
REF
and then V
t
t
t
t
t
t
t
RP time, during this time NOPs or DESELECT commands must be given.
MRD time, only NOPs or DESELECT commands are allowed.
MRD time, only NOPs or DESELECT commands are allowed.
RP time, only NOPs or DESELECT commands are allowed.
RFC time, only NOPs or DESELECT commands are allowed.
RFC time, only NOPs or DESELECT commands are allowed.
MRD time, only NOPs or DESELECT commands are allowed.
TT
power.
81
DD
and V
Micron Technology, Inc., reserves the right to change products or specifications without notice.
DD
128Mb: x4, x8, x16 DDR SDRAM
Q.
©2000 Micron Technology, Inc. All rights reserved.
Initialization

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