MT46V32M4TG-6T:D TR Micron Technology Inc, MT46V32M4TG-6T:D TR Datasheet - Page 47

• Manufacturer Part Number: MT46V32M4TG-6T:D TR
• Description: IC DDR SDRAM 128MBIT 6NS 66TSOP
• Manufacturer: Micron Technology Inc

Specifications of MT46V32M4TG-6T:D TR

• Format - Memory: RAM
• Memory Type: DDR SDRAM
• Memory Size: 128M (32Mx4)
• Speed: 6ns
• Interface: Parallel
• Voltage - Supply: 2.3 V ~ 2.7 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 66-TSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 557-1024-2

PRECHARGE
Figure 31:
Power-Down (CKE Not Active)
09005aef8074a655
128MBDDRx4x8x16_2.fm - Rev. J 4/05 EN
PRECHARGE Command
The PRECHARGE command, as shown in Figure 31, is used to deactivate the open row in
a particular bank or the open row in all banks. The bank(s) will be available for a subse-
quent row access some specified time (
Input A10 determines whether one or all banks are to be precharged, and in the case
where only one bank is to be precharged, inputs BA0, BA1 select the bank. When all
banks are to be precharged, inputs BA0, BA1 are treated as “Don’t Care.” Once a bank has
been precharged, it is in the idle state and must be activated prior to any READ or WRITE
commands being issued to that bank.
Unlike SDR SDRAMs, DDR SDRAMs require CKE to be active at all times an access is in
progress, from the issuing of a READ or WRITE command until completion of the access.
Thus a clock suspend is not supported. For READs, an access completion is defined
when the Read Postamble is satisfied; for WRITEs, an access completion is defined when
the Write Recovery time (
Power-down as shown in Figure 32 on page 48, is entered when CKE is registered LOW
and all Table 10 (page 49)criteria are met. If power-down occurs when all banks are idle,
this mode is referred to as precharge power-down; if power-down occurs when there is a
row active in any bank, this mode is referred to as active power-down. Entering power-
A0–A9, A11
BA = Bank Address (if A10 is LOW;
otherwise “Don’t Care”)
BA0,1
CAS#
RAS#
WE#
A10
CKE
CK#
CS#
CK
HIGH
ALL BANKS
ONE BANK
DON’T CARE
t
BA
WR) is satisfied.
47
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
RP) after the PRECHARGE command is issued.
128Mb: x4, x8, x16 DDR SDRAM
©2000 Micron Technology, Inc. All rights reserved.
Operations