MT46V32M4TG-6T:D TR Micron Technology Inc, MT46V32M4TG-6T:D TR Datasheet - Page 34

• Manufacturer Part Number: MT46V32M4TG-6T:D TR
• Description: IC DDR SDRAM 128MBIT 6NS 66TSOP
• Manufacturer: Micron Technology Inc

Specifications of MT46V32M4TG-6T:D TR

• Format - Memory: RAM
• Memory Type: DDR SDRAM
• Memory Size: 128M (32Mx4)
• Speed: 6ns
• Interface: Parallel
• Voltage - Supply: 2.3 V ~ 2.7 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 66-TSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 557-1024-2

Figure 19:
09005aef8074a655
128MBDDRx4x8x16_2.fm - Rev. J 4/05 EN
COMMAND
COMMAND
COMMAND
ADDRESS
ADDRESS
ADDRESS
READ to PRECHARGE
DQS
DQS
DQS
CK#
CK#
CK#
DQ
DQ
DQ
CK
CK
CK
6
6
6
Notes: 1. DO n = data-out from column n.
Bank a,
Bank a,
Bank a,
READ
READ
READ
Col n
Col n
Col n
T0
T0
T0
2. Burst length = 4, or an interrupted burst of 8.
3. Three subsequent elements of data-out appear in the programmed order following DO n..
4. Shown with nominal
5. READ to PRECHARGE equals two clocks, which allows two data pairs of data-out; it is also
6. A READ command with AUTO-PRECHARGE enabled, provided
7. An active command to the same bank is only allowed if
8. PRE = PRECHARGE command; ACT = ACTIVE command.
assumed that tRAS (MIN) is met.
cause a precharge to be performed at x number of clock cycles after the READ command,
where x = BL / 2.
CL = 2
NOP
NOP
NOP
T1
T1
T1
CL = 2.5
CL = 3
t
AC,
(a or all)
(a or all)
(a or all)
Bank a,
Bank a,
Bank a,
T2
PRE
PRE
PRE
T2
T2
t
DQSCK, and
34
DO
n
T2n
T2n
DO
n
Micron Technology, Inc., reserves the right to change products or specifications without notice.
T3
NOP
T3
NOP
T3
NOP
t
DQSQ.
DON’T CARE
DO
n
t RP
t RP
t RP
T3n
T3n
T3n
128Mb: x4, x8, x16 DDR SDRAM
T4
T4
T4
NOP
NOP
NOP
t
RC (MIN) has been satisfied.
TRANSITIONING DATA
T4n
©2000 Micron Technology, Inc. All rights reserved.
t
RAS(MIN) is met, would
Bank a,
Bank a,
Bank a,
T5
T5
T5
ACT
ACT
ACT
Row
Row
Row
7
7
7
Operations