MT46V32M4TG-6T:D TR Micron Technology Inc, MT46V32M4TG-6T:D TR Datasheet - Page 61

• Manufacturer Part Number: MT46V32M4TG-6T:D TR
• Description: IC DDR SDRAM 128MBIT 6NS 66TSOP
• Manufacturer: Micron Technology Inc

Specifications of MT46V32M4TG-6T:D TR

• Format - Memory: RAM
• Memory Type: DDR SDRAM
• Memory Size: 128M (32Mx4)
• Speed: 6ns
• Interface: Parallel
• Voltage - Supply: 2.3 V ~ 2.7 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 66-TSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 557-1024-2

Table 23:
09005aef8074a655
128MBDDRx4x8x16_2.fm - Rev. J 4/05 EN
Parameter/Condition
OPERATING CURRENT: One bank; Active-Precharge;
t
changing once per clock cycle; Address and control inputs
changing once every two clock cycles
OPERATING CURRENT: One bank; Active-Read-Precharge;
Burst = 2;
and control inputs
PRECHARGE POWER-DOWN STANDBY CURRENT: All banks idle;
Power-down mode;
CKE = (LOW)
IDLE STANDBY CURRENT: CS# = HIGH; All banks are idle;
t
changing once per clock
ACTIVE POWER-DOWN STANDBY CURRENT: One bank active;
Power-down mode;
ACTIVE STANDBY CURRENT: CS# = HIGH; CKE = HIGH;
One bank active
DQS inputs changing twice per clock cycle; Address and other
control inputs changing once per clock cycle
OPERATING CURRENT: Burst = 2;
One bank active; Address and control inputs changing once per
clock cycle;
OPERATING CURRENT: Burst = 2; Writes; Continuous burst;
One bank
clock cycle;
twice per clock cycle
AUTO REFRESH BURST CURRENT:
SELF REFRESH CURRENT: CKE ≤ 0.2V
OPERATING CURRENT: Four bank interleaving READs
(Burst = 4) with auto precharge,
t
Active READ, or WRITE commands
RC =
CK =
CK =
t
t
t
CK (MIN); Address and control inputs change only during
RC (MIN);
CK (MIN);
t
active; Address and control inputs changing once per
RC =
t
t
CK =
CK =
I
0°C ≤ T
Notes: 1–5, 10, 12, 14, 14; notes appear on page 69-74; See also Table 26, Idd Test Cycle Times, on page 64
DD
;
t
RC (MIN);
t
t
t
t
CKE = HIGH; Address and other control inputs
Specifications and Conditions (x4, x8; -75Z/-75)
CK =
RC =
CK (MIN);
CK (MIN); DQ, DM, and DQS inputs changing
changing once per clock cycle
A
t
t
CK =
CK =
≤ +70°C; V
t
t
CK (MIN); DQ, DM and DQS inputs
RAS (MAX);
cycle. V
t
t
t
CK (MIN); CKE = LOW
CK =
CK (MIN);
I
OUT
DD
IN
t
= 0mA
RC = minimum tRC allowed;
t
CK (MIN); I
Reads; Continuous burst;
Q = +2.5V ±0.2V, V
= V
t
CK =
REF
for DQ, DQS, and DM
t
CK (MIN); DQ, DM and
OUT
t
t
Standard
Low Power (L)
REFC =
REFC = 15.6µs
= 0mA; Address
DD
t
RC (MIN)
= +2.5V ±0.2V
61
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Symbol
I
I
I
I
I
I
I
I
DD
I
I
DD
I
DD
I
DD
I
DD
DD
DD
DD
DD
DD
DD
DD
DD
4W
3N
5A
6A
2P
3P
4R
2F
0
1
5
6
7
128Mb: x4, x8, x16 DDR SDRAM
-75Z/-75
Max
105
120
125
120
220
325
1.3
40
20
45
3
5
2
©2000 Micron Technology, Inc. All rights reserved.
Parameter Tables
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
Notes
22, 15
22, 15
22, 15
27, 17
22, 16
23, 7
23, 7
18
22
22
17
11
11