Z8L180 ZILOG [Zilog, Inc.], Z8L180 Datasheet - Page 46

• Manufacturer Part Number: Z8L180
• Description: Z8018x Family MPU
• Manufacturer: ZILOG [Zilog, Inc.]

HALT and Low Power Operation Modes (Z80180-Class
Also, the WAIT input is ignored during RESET. For example, if RESET
is detected while the Z8X180 is in a Wait State (TW), the Wait Stated
cycle in progress is aborted, and the RESET sequence initiated. Thus,
RESET has higher priority than WAIT.
The Z80180 can operate in two different modes:
•
•
and two low-power operation modes:
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•
In all operating modes, the basic CPU clock (XTAL, EXTAL) must
remain active.
HALT Mode
HALT mode is entered by execution of the HALT instruction (Op Code
76H
•
•
•
•
•
•
IOSTOP mode
SLEEP
SYSTEM STOP
) and has the following characteristics:
The internal CPU clock remains active
All internal and external interrupts can be received
Bus exchange (BUSREQ and BUSACK) can occur
Dynamic RAM refresh cycle (RFSH) insertion continues at the
programmed interval
I/O operations (ASCI, CSI/O and PRT) continue
The DMAC can operate
HALT mode
Processors Only)
M PU Us e r M anual
UM005001-ZMP0400
Z 8018x Fam il y
31