Z8L180 ZILOG [Zilog, Inc.], Z8L180 Datasheet - Page 119

• Manufacturer Part Number: Z8L180
• Description: Z8018x Family MPU
• Manufacturer: ZILOG [Zilog, Inc.]

104
UM005001-ZMP0400
Z 8018x Fam il y
M PU Us e r M anual
Bits 5–3
Reserved. Must be 0.
Bits 2–0
With DIM1, bit 1 of DCNTL, these bits control which request is
presented to DMA channel 1, as described below:
DMA Operation
This section discusses the three DMA operation modes for channel 0:
•
•
•
DIM1
0
0
0
0
0
0
0
1
1
1
1
1
1
1
Memory to/from memory
Memory to/from I/O
Memory to/from memory mapped I/O
IAR18–16 Request Routed to DMA Channel 1
000
001
010
011
10X
1X0
111
000
001
010
011
10X
1X0
111
DREQ1
ASCI0 Tx
ASCI1 Tx
ext CKA0/DREQ0
Reserved
Reserved
Reserved
ext DREQ1
ASCI0 Rx
ASCI1 Rx
ext CKA0/DREQ0
Reserved
Reserved
Reserved