Z8L180 ZILOG [Zilog, Inc.], Z8L180 Datasheet - Page 131

• Manufacturer Part Number: Z8L180
• Description: Z8018x Family MPU
• Manufacturer: ZILOG [Zilog, Inc.]

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UM005001-ZMP0400
Z 8018x Fam il y
M PU Us e r M anual
The key functions for ASCI on Z80180, Z8S180 and Z8L180 class
processors are listed below. Each channel is independently
programmable.
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ASCI Block Diagram for the Z8S180/Z8L180-Class
Processors
Figure 52 illustrates the ASCI block diagram.
Full-duplex communication
7- or 8-bit data length
Program controlled 9th data bit for multiprocessor communication
1 or 2 stop bits
Odd, even, no parity
Parity, overrun, framing error detection
Programmable baud rate generator, /16 and /64 modes
Modem control signals – Channel 0 contains DCD0, CTS0 and
RTS0; Channel 1 contains CTS1
Programmable interrupt condition enable and disable
Operation with on-chip DMAC