Z8L180 ZILOG [Zilog, Inc.], Z8L180 Datasheet - Page 100

• Manufacturer Part Number: Z8L180
• Description: Z8018x Family MPU
• Manufacturer: ZILOG [Zilog, Inc.]

Table 10. RETI Control Signal States
Machine
Cycle
1
2
3
4
5
6
7
8
9
10
IOC affects the IORQ/RD signals. M1E affects the assertion of M1. One state also reflects a 1 while
the other reflects a 0
States Address Data
T1-T3 1st
TI-T3 2nd
T1
T1
T1
T1-T3 1st
T1
T1-T3 2nd
T1-T3 SP
T1-T3 SP+1
Z8X180. Figure 43 illustrates the INT1, INT2 and internal interrupts
timing.
Op Code
Op Code
Don't
Care
Don't
Care
Don't
Care
Op Code
Don't
Care
Op Code
EDH
4DH
3-state
3-state
3-state
EDH
3-state
4DH
data
data
RD WR MREQ IORQ
0
0
1
1
1
0
1
0
0
0
1
1
1
1
1
1
1
1
1
1
0
0
1
1
1
0
1
0
0
0
1
1
1
1
1
1
1
1
1
1
MI
M1E=1 M1E=0 HALT ST
0
0
1
1
1
0
1
0
1
1
M PU Us e r M anual
UM005001-ZMP0400
Z 8018x Fam il y
1
1
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
1
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