Z8L180 ZILOG [Zilog, Inc.], Z8L180 Datasheet - Page 188
Z8L180
Manufacturer Part Number
Z8L180
Description
Z8018x Family MPU
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
1.Z8L180.pdf
(326 pages)
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Software Architecture
INSTRUCTION SET
The Z80180 is object code-compatible with the Z80 CPU. Refer to the
Z80 CPU Technical Manual or the Z80 Assembly Language
Programming Manual for further details.
Table 26. Instruction Set Summary
SLP - Sleep
The SLP instruction causes the Z80180 to enter the SLEEP low power
consumption mode. See page 32 for a complete description of the SLEEP
state.
New Instructions Operation
SLP
MLT
INO g, (m)
OUT0 (m), g
OTIM
OTIMR
OTDM
OTDMR
TSTIO m
TST g
TST m
TST (HL)
Enter SLEEP mode
8-bit multiply with 16-bit result
Input contents of immediate I/O address
Output register contents to immediate I/O address
Block output - increment
Block output - increment and repeat
Block output - decrement
Block output - decrement and repeat
Non-destructive AND, I/O port, and accumulator
Non-destructive AND, register, and accumulator
Non-destructive AND, immediate data, and accumulator
Non-destructive AND, memory data, and accumulator
M PU Us e r M anual
UM005001-ZMP0400
Z 8018x Fam il y
173
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