Z8L180 ZILOG [Zilog, Inc.], Z8L180 Datasheet - Page 36

• Manufacturer Part Number: Z8L180
• Description: Z8018x Family MPU
• Manufacturer: ZILOG [Zilog, Inc.]

A0
D0
MREQ
WAIT
–
–
A19
WR
Phi
RD
D7
Wait States (TW) are inserted as previously described for Op Code fetch
cycles. Figure 11 illustrates the read/write timing without Wait States
(Tw), while Figure 12 illustrates read/write timing with Wait States (TW).
Figure 11.
T1
Memory address
Read Cycle
T2
Memory Read/Write (without Wait State) Timing Diagram
Read data
T3
T1
Memory address
Write Cycle
T2
Write data
M PU Us e r M anual
UM005001-ZMP0400
T3
Z 8018x Fam il y
T1
21