peb2255 Infineon Technologies Corporation, peb2255 Datasheet - Page 86

• Manufacturer Part Number: peb2255
• Description: E1/t1/j1 Framer And Line Interface Component For Long And Short Haul Applications
• Manufacturer: Infineon Technologies Corporation

4.4.3
The multiframe structure shown in
FMR2.RFS1/0 for the receiver and FMR1.XFS for the transmitter.
Multiframe
Frame alignment
Multiframe alignment :
CRC bits
CRC block size
CRC procedure
Table 19
Multiframe I
E:
S
C
A:
Data Sheet
a
1
:
… C
4
:
CRC-Multiframe (E1)
Spare bits for international use. Access to received information via bits
RSP.RS13 and RSP.RS15. Transmission is enabled via bits XSP.XS13 and
XSP.XS15. Additionally, automatic transmission for submultiframe error
indication is selectable.
Spare bits for national use. Additionally, Sa bit access via registers
RSA4 … 8 and XSA4 … 8 is provided. HDLC-signaling in bits Sa4- Sa8 is
selectable.
Cyclic redundancy check bits.
Remote alarm indication. Additionally, automatic transmission of the A-bit is
selectable.
Sub-
Multiframe
II
CRC-Multiframe Structure (E1)
:
:
:
:
:
2 submultiframes = 2
refer to section Doubleframe Format
bit 1 of frames 1, 3, 5, 7, 9, 11 with the pattern ‘001011’
bit 1 of frames 0, 2, 4, 6, 8, 10, 12, 14
2048 bit (length of a submultiframe)
CRC4, according to ITU-T G.704, G.706)
Frame
Number
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Table 19 Table
86
1
C
0
C
0
C
1
C
0
C
1
C
1
C
E*
C
E*
1
2
3
4
1
2
3
4
8 frames
2
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Bits 1 to 8 of the Frame
3
0
A
0
A
0
A
0
A
0
A
0
A
0
A
0
A
is enabled by setting bit:
Functional Description E1
4
1
S
1
S
1
S
1
S
1
S
1
S
1
S
1
S
a4
a4
a4
a4
a4
a4
a4
a4
5
1
S
1
S
1
S
1
S
1
S
1
S
1
S
1
S
a5
a5
a5
a5
a5
a5
a5
a5
FALC-LH V1.3
6
0
S
0
S
0
S
0
S
0
S
0
S
0
S
0
S
a61
a62
a63
a64
a61
a62
a63
a64
PEB 2255
7
1
S
1
S
1
S
1
S
1
S
1
S
1
S
1
S
a7
a7
a7
a7
a7
a7
a7
a7
2000-07
8
1
S
1
S
1
S
1
S
1
S
1
S
1
S
1
S
a8
a8
a8
a8
a8
a8
a8
a8