peb2255 Infineon Technologies Corporation, peb2255 Datasheet - Page 289

• Manufacturer Part Number: peb2255
• Description: E1/t1/j1 Framer And Line Interface Component For Long And Short Haul Applications
• Manufacturer: Infineon Technologies Corporation

XLHP…
XLT...
DAXLT...
Idle Channel Code Register (Read/Write)
Value after RESET: 00
IDL7…IDL0…
Data Sheet
IDLE
IDL7
7
Transmit Line High Power
0…
1…
For absolute values see DC Characteristics.
Transmit Line Tristate
0
1
Disable Automatic Tristating of XL1/2
0...
1...
Idle Channel Code
If channel loop back is enabled by programming the register
LOOP.ECLB = 1, the contents of the assigned outgoing channel on
ports XL1/XL2 respective XDOP/XDON is set equal to the idle
channel code selected by this register.
Additionally, the specified pattern overwrites the contents of all
channels of the outgoing PCM frame selected via the idle channel
registers ICB1…ICB3. IDL7 is transmitted first.
With this bit the output current capability of transmit lines XL1/XL2 is
increased. According to the DC characteristics, this bit has to be set,
if an output current of more than 60 mA is required.
H
Output current low
output current high
Normal operation
Transmit line XL1/XL2 or XDOP/XDON are switched into high
impedance state. If this bit is set the transmit line monitor status
information is frozen.
Normal operation. If a short is detected on pins XL1/2 the
transmit line monitor sets the XL1/2 outputs into a high
impedance state.
If a short is detected on pins XL1/2 an automatic setting these
pins into a high impedance state (by the XL-monitor) is
disabled.
289
FALC-LH V1.3
T1/J1 Registers
IDL0
0
PEB 2255
2000-07
(29)