peb2255 Infineon Technologies Corporation, peb2255 Datasheet - Page 235

• Manufacturer Part Number: peb2255
• Description: E1/t1/j1 Framer And Line Interface Component For Long And Short Haul Applications
• Manufacturer: Infineon Technologies Corporation

TS16LFA…
XLS…
XLO…
Data Sheet
1…
Transmit Line Short
Significant only if the ternary line interface is selected by
LIM1.DRS=0.
0…
Transmit Line Open
0…
Receive Timeslot 16 Loss of Multiframe Alignment
0…
1…
1…
The CAS controller is in synchronous state after frame
alignment is accomplished.
This bit is set if the framing pattern ‘0000’ in 2 consecutive CAS
multiframes were not found or in all TS16 of the preceding
multiframe all bits were reset. An interrupt ISR3.LMFA16 is
generated.
Normal operation. No short is detected.
The XL1 and XL2 are shortened for at least 32 pulses. As a
reaction of the short the pins XL1 and XL2 are automatically
forced into a high impedance state if bit XPM2.DAXLT is reset.
After 32 consecutive pulse periods the outputs XL1/2 are
activated again and the internal transmit current limiter is
checked. If a short between XL1/2 is still further active the
outputs XL1/2 are in high impedance state again. When the
short disappears pins XL1/2 are activated automatically and
this bit is reset. With any change of this bit an interrupt
ISR1.XLSC is generated. In case of XPM2.XLT is set this bit is
frozen.
Normal operation
This bit is set if at least 32 consecutive zeros were sent via pins
XL1/XL2 or XDOP/XDON. This bit is reset with the first
transmitted pulse. With the rising edge of this bit an interrupt
ISR1.XLSC is set. In case of XPM2.XLT is set this bit is frozen.
235
FALC-LH V1.3
E1 Registers
PEB 2255
2000-07