peb2255 Infineon Technologies Corporation, peb2255 Datasheet - Page 249

• Manufacturer Part Number: peb2255
• Description: E1/t1/j1 Framer And Line Interface Component For Long And Short Haul Applications
• Manufacturer: Infineon Technologies Corporation

Received Byte Count High (Read)
OV…
RBC11...8…
Interrupt Status Register 0 (Read)
Value after RESET: 00
All bits are reset when ISR0 is read.
If bit IPC.VIS is set, interrupt statuses in ISR0 may be flagged although they are masked
via register IMR0. However, these masked interrupt statuses neither generate a signal
on INT, nor are visible in register GIS.
RME…
Data Sheet
RBCH
ISR0
RME
7
7
More than 4095 bytes received.
Together with RBCL (bits RBC7…RBC0) indicate the length of the
received frame.
One complete message of length less than 32 bytes, or the last part
of a frame at least 32 bytes long is stored in the receive FIFO,
including the status byte.
The complete message length can be determined reading the RBCH,
RBCL registers, the number of bytes currently stored in RFIFO is
given by RBC4...0. Additional information is available in the RSIS
register.
Counter Overflow
Receive Byte Count (most significant bits)
Receive Message End
RFS
H
T8MS
RMB
OV
249
RBC11
CASC
RBC10
CRC4
SA6SC
RBC9
FALC-LH V1.3
RBC8
RPF
E1 Registers
0
0
PEB 2255
2000-07
(67)
(68)