peb2255 Infineon Technologies Corporation, peb2255 Datasheet - Page 50

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peb2255

Manufacturer Part Number
peb2255
Description
E1/t1/j1 Framer And Line Interface Component For Long And Short Haul Applications
Manufacturer
Infineon Technologies Corporation
Datasheet

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Figure 8
3.3.1.3
Special events in the FALC
programmable characteristics (open drain, push-pull; IPC register), which requests the
CPU to read status information from the FALC
LH.
Since only one INT request output is provided, the cause of an interrupt must be
determined by the CPU by reading the FALC’s interrupt status registers (GIS, ISR0...3,
ISR5) that means the interrupt at pin INT and the interrupt status bits are reset by reading
the interrupt status registers. Register ISR0...3,5 are from type “Clear on Read“.
The structure of the interrupt status registers is shown in
Data Sheet
D15
32
32
1
4
3
2
1
Interrupt Interface
FIFO Word Access (Motorola Mode)
D8 D7
RFIFO
Byte 4
Byte 3
Byte 2
Byte 1
®
-LH are indicated by means of a single interrupt output with
D0
50
®
-LH, or to transfer data from/to FALC
D15
Functional Description E1/T1/J1
32
32
1
1
4
3
2
Figure
D8
XFIFO
Byte 4
Byte 3
Byte 2
Byte 1
9.
D7
FALC-LH V1.3
PEB 2255
ITD01799
2000-07
D0
®
-

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