peb2255 Infineon Technologies Corporation, peb2255 Datasheet - Page 41

• Manufacturer Part Number: peb2255
• Description: E1/t1/j1 Framer And Line Interface Component For Long And Short Haul Applications
• Manufacturer: Infineon Technologies Corporation

Table 4
Pin No.
69
80
Data Sheet
Symbol
DLX
XSIG
Pin Definitions - System Interface (cont’d)
Input (I)
Output (O)
Supply (S)
O
I
Function
Data Link Bit Transmit
E1 mode: Marks the S
stream on XDI. The S
slot 0 of every frame not containing the frame
alignment signal are selected by register
XC0.SA4E-SA8E.
T1/J1 mode: This output provides a signal which
marks the DL-bit position within the data stream
on XDI. In 4096 kbit/s mode DLX is active only
during the channel phase selected by
RCO.SICS.
Transmit Signaling Data
Input for transmit signaling data received from
the signaling highway.
This function is selected by setting
LOOP.SPN = 1
LIM3.ESY = 1
Note: This pin contains multiple functions, see
41
also SYNC2 and ROID.
A
A
4...8 bit positions in time-
4...8 bits within the data
Pin Descriptions
FALC-LH V1.3
PEB 2255
2000-07